FIG. 1 illustrates a prior art system for rendering video data in a computer system. Specifically, the prior art system of FIG. 1 illustrates a video-input signal being received by a video decoder. Such a video-input signal could be from a television, VCR, DVD player, or compressed video data. The received video data is decoded, as necessary by the video decoder which and provides a video-output across the PCI bus to the video memory associated with the graphics adapter of FIG. 1. The data stored within the video memory is then displayed on the graphics device which is also connected to the graphics adapter.
The prior art configuration of FIG. 1 can be inefficient because of the need to transport the video data across the PCI bus. In order for the decoded data to be stored within the graphics adapter's video memory, it is necessary for the video decoder to have its PCI bus control logic to store the rendered video information within the video memory. The hardware necessary for the video decoder to interface to the PCI bus is costly in terms of space and design implementation. Another inefficiency of the system of FIG. 1 is the use of PCI bandwidth by the video decoder when transmitting the data to the video memory. The video decoder is capable of performing the data transfer, and does not require system processor intervention. However, the system processor can be stalled if it needs to access the PCI bus during a transfer of video data by the video decoder. Therefore, the bandwidth used by the video decoder can prevent a system processor, or any other peripheral requiring the PCI bus, from functioning optimally when unable to access the PCI bus. For example, for a 320-by-240 pixel screen the number of bytes of data that need to be transferred each second between the video decoder and the video memory would be at least 320×240×2 bytes×60 frames per second.
FIG. 2 illustrates a second prior art solution to overcome these problems. In the prior art system of FIG. 2, the video input is received by the video decoder in the same manner as discussed with FIG. 1. However, the decoded data is not transferred to the graphics adapter across the PCI bus. Instead, the decompressed data is transferred across a dedicated local bus. By transmitting the video data from the decoder to the graphics adapter across the dedicated bus, the bandwidth associated with its use of the PCI bus is eliminated, thereby freeing PCI bandwidth for other peripherals or CPU. In addition, the use of a dedicated local bus allows for the expensive PCI hardware associated with the video controller of FIG. 1 to be avoided.
In general, the control circuitry associated with the local bus of FIG. 2 is inconsequential as compared to the overhead associated with the PCI bus of FIG. 1. The advantage of using the dedicated bus of the type in FIG. 2 is that it requires the video decoder to be connected to a single graphics adapter. With computer systems, such as Windows 98, it is necessary for the video decoder to be associated with the primary adapter on the PCI bus in order to display active video, where the primary adapter is the video adaptor first identified in the hardware by the operating system.
Therefore, a system that allows for a video-input signal to be displayed on a primary adapter, or any of a number of secondary video adapters, would be advantageous.
It should be understood that the figures included herein illustrate specific embodiments of the present invention. Other embodiments of the present invention may exist. Specific elements illustrated with the embodiments herein are not intended to represent actual size, location relationships between the components.